With developments in electronics technology in recent years, the size of electronic components has been reduced rapidly. In the field of multilayered-type ceramic capacitors, there have also been increased demands for smaller size and higher capacitance. Consequently, ceramic materials having a high relative dielectric constant have been undergoing development, and efforts have been made to reduce the thickness of dielectric ceramic layers and increase the number of dielectric ceramic layers to be stacked.
For example, Patent Document 1 proposes a dielectric ceramic represented by the general formula: {Ba1-x-yCaxReyO}mTiO2+αMgO+βMnO (where Re represents a rare-earth element selected from the group consisting of Y, Gd, Tb, Dy, Ho, Er, and Yb, and α, β, m, x, and y, respectively, satisfy the relationships 0.001≦α≦0.05, 0.001≦β≦0.025, 1.000<m≦1.035, 0.02≦x≦0.15, and 0.001≦y≦0.06).
Patent Document 1 discloses a multilayered-type ceramic capacitor using the dielectric ceramic described above, and it is possible to obtain a multilayered-type ceramic capacitor in which the thickness of each ceramic layer is 2 μm, the number of effective dielectric ceramic layers is 5, the relative dielectric constant ∈r is 1,200 to 3,000, and the dielectric loss is 2.5% or less.
While the multilayered-type ceramic capacitor of Patent Document 1 utilizes the action of the ceramic itself as a dielectric, research and development has been actively carried out on semiconductor ceramic capacitors, which are different in principle.
A SrTiO3-based grain boundary insulation type semiconductor ceramic is one of such semiconductor ceramic capacitors, in which a ceramic shaped body is subjected to firing (primary firing) in a strongly reducing atmosphere to make the ceramic shaped body semiconductive, and again firing (secondary firing) in an oxidizing atmosphere so that grain boundaries become dielectric. Although the relative dielectric constant ∈r of SrTiO3 itself is low at about 200, since grain boundaries have capacitance, the apparent relative dielectric constant ∈rAPP can be increased by increasing the grain size to decrease the number of grain boundaries.
For example, Patent Document 2 proposes a SrTiO3-based grain boundary insulation type semiconductor porcelain body in which the average grain size of crystal grains is 10 μm or less and the maximum grain size is 20 μm or less, and it is possible to obtain a semiconductor porcelain body having an apparent relative dielectric constant ∈rAPP of 9,000 when the average grain size of crystal grains is 8 μm, although it is a semiconductor ceramic capacitor having a single-layer structure.    Patent Document 1: Japanese Unexamined Patent Application Publication No. 11-302072    Patent Document 2: Japanese Patent No. 2689439